Icarus Verilog: Simulator overflows its stack on a stable loop through a real or strength net
Fixed · medium · Crash
If a wire drives itself through bufif1, or a real variable assigns itself, vvp recurses. vvp recurses until it segfaults at time 0, even though the value never changes.
Found: ; reported: ; status since: . Reporter: Mike Murunov
Page for this report · Public report · Fix or proposed fix (see status)
Reopening since there is a second part to this where we still get a stack overflow when we have a feedback loop that never settles.